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E2C0038-27-Y4 Semiconductor
Semiconductor MSM9210
GENERAL DESCRIPTION
This version: Nov. 1997 MSM9210 Previous version: Jul. 1996
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32-Bit Duplex/Triplex (1/2 duty / 1/3 duty) VF Controller/Driver with Digital Dimming
The MSM9210 is a full CMOS controller/driver for Duplex or Triplex (1/2 duty or 1/3 duty) vacuum fluorescent display tube. It consists of a 32-segment driver multiplexed to drive up to 96 segments, and 10-bit digital dimming circuit. MSM9210 features a selection of a master mode and a slave mode, and therefore it can be used to expand segments for the VFD driver with keyscan and A/D converter function. MSM9210 provides an interface with a microcontroller only by three signal lines: DATA IN, CLOCK and CS.
FEATURES
* Logic supply voltage (VDD) : 4.5 to 5.5V : 8 to 18V * Driver supply voltage (VDISP) * Duplex/Triplex (1/2 duty / 1/3 duty) selectable * Master/Slave selectable * Applicable VF tube : 2 Grids 32 Anodes VF tube : 3 Grids 32 Anodes VF tube * 32-segment driver outputs : IOH=-5mA at VOH=VDISP-0.8V (SEG1 to 22) : IOH=-10mA at VOH=VDISP-0.8V (SEG23 to 32) * 3-grid pre-driver outputs : IOL=10mA at VOL=2V * Built-in digital dimming circuit (10-bit resolution) * Built-in oscillation circuit (external R and C) * Built-in Power-On-Reset circuit * Package: 56-pin plastic QFP (QFP56-P-910-0.65-2K) Product name: MSM9210GS-2K
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Semiconductor
MSM9210
BLOCK DIAGRAM
GRID1 GRID2 GRID3
SEG1
SEG32
VDISP D-GND VDD L-GND
0H
32 Segment Driver
3 Grid pre Driver
Power On Reset
4H
POR Out1-32 96 to 32 Segment Control in1-32
in1-32
in1-32
1H
Mode Select
POR
0H POR
in1-3
Out1-32 Segment Latch 1 in1-32
2H 0H POR
Out1-32 Segment Latch 2 in1-32
3H 0H POR
Out1-32 Segment Latch 3 in1-32
CS CLOCK DATA IN Control
Out1-3 3bit Shift Register
POR
Out1-32 32bit Shift Register
4H POR
in1-10 Dimming Latch Out1-10
POR
OSC0 OSC1 DIM IN SYNC IN1 SYNC IN2 M/S DUP/TRI
OSC
POR
10bit Digital Dimming
DIM OUT SYNC OUT1 Timing Generator SYNC OUT2
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Semiconductor
PIN CONFIGURATION (TOP VIEW)
SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 GRID1
GRID2 10 GRID3 11 D-GND 12 NC 13 VDD 14

49 D-GND 55 SEG24 54 SEG23 53 SEG22 52 SEG21 51 SEG20 50 SEG19 48 SEG18 47 SEG17 46 SEG16 56 VDISP
1 2 3 4 5 6 7 8 9
MSM9210
45 SEG15
44 SEG14
43 VDISP
42 SEG13 41 SEG12 40 SEG11 39 SEG10 38 SEG9 37 SEG8 36 SEG7 35 SEG6 34 SEG5 33 SEG4 32 SEG3 31 SEG2 30 SEG1 29 NC
DIM IN 15
SYNC IN 1 16
SYNC IN 2 17
CS 18
CLOCK 19
DATA IN 20
L-GND 21
OSC1 22
OSC0 23
DUP/TRI 24
M/S 25
SYNC OUT 2 26
SYNC OUT 1 27
NC: No connection 56-pin Plastic QFP
DIM OUT 28
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Semiconductor
MSM9210
PIN DESCRIPTIONS
Symbol VDISP VDD D-GND L-GND SEG1 to 22 Pin 43,56 14 12, 49 21 30 to 42, 44 to 53 54, 55, 57 to 8 9, 10, 11 18 19 20 Type -- -- -- -- O Description Power supply pins for VF driver circuit. 43 pin and 56 pin should be connected externally. Power supply pin for logic drive. D-GND is ground pin for the VF driver circuit. L-GND is ground pin for the logic circuit. 12pin, 21pin and 49pin should be connected externally. Segment (anode) signal output pins for a VF tube. These pins can be directly connected to the VF tube. External circuit is not required. IOH5mA Segment (anode) signal output pins for a VF tube.These pins can be directly O connected to the VF tube. External circuit is not required. IOH10mA O I I I Inverted Grid signal output pins. For pre-driver, the external circuit is required. IOL10mA Chip select input pin. Data is not transferred when CS is set to a "L" level. Serial clock input pin. Serial data shifts at the rising edge of the CLOCK. Serial data input pin. Data is input to the shift register at the rising edge of the serial clock. Duplex/Triplex operation select input pin. Duplex (1/2 duty) operation is selected when this pin is set to VDD. Connect this pin to VDD when 1/2 duty VF tube is driven. Triplex (1/3 duty) operation is selected when this pin is set to L-GND. Master/Slave mode select input pin. Master mode is selected when this pin is set to VDD. Slave mode is selected when this pin is set to L-GND. Dimming pulse input. When the slave mode is selected, the pulse width of the all segment output are controlled by a input pulse width of DIM IN. Connect this pin to the master side DIM OUT pin at the slave mode. When the master mode is selected, the input level of this pin is ignored and the pulse width of the all grids and segment outputs are controlled by a built-in 10-bit dimming circuit. Connect this pin to VDD or L-GND at the master mode. Synchronous signal input. When the slave mode is selected, connect these pins to the master side SYNC OUT 1, 2 pins. When the master mode is selected, the input level of these pins are ignored. Connect these pins to VDD or L-GND at the master mode. Dimming pulse output. When two this driver ICs are used, connect this pin to the slave side DIM IN pin.
SEG23 to 32
GRID1 to 3 CS CLOCK DATA IN
DUP/TRI
24
I
M/S
25
I
DIM IN
15
I
SYNC IN 1, 2
16, 17
I
DIM OUT
28
O
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Semiconductor
MSM9210
Symbol SYNC OUT 1, 2
Pin 26, 27
Type O
Description Synchronous signal output. When two this driver ICs are used, connect these pins to the slave side SYNC IN 1, 2 pin. RC oscillator connecting pins. Connect a resistor (R2) between the OSC1 and OSC0 pins and a capacitor (C2) between the OSC0 pin and the ground. Oscillation frequency is 3.3MHz. OSC0 R2 OSC1 C2
OSC0
23
I
OSC1
22
O
ABSOLUTE MAXIMUM RATING
Parameter Driver Supply Voltage Logic Supply Voltage Input Voltage Power Dissipation Storage Temperature Symbol VDISP VDD VIN PD TSTG IO1 Output Current IO2 IO3 IO4 Condition -- -- -- Ta=85C -- SEG1 to 22 SEG23 to 32 GRID1~3 DIM OUT, SYNC OUT1, SYNC OUT2 Ratings -0.3 to 20 -0.3 to 6.5 -0.3 to VDD+0.3 360 -65 to 150 -10.0 to 2.0 -20.0 to 2.0 -2.0 to 20.0 -2.0 to 2.0 Unit V V V mW C mA mA mA mA
RECOMMENDED OPERATING CONDITIONS
Parameter Driver Supply Voltage Logic Supply Voltage High Level Input Voltage Low Level Input Voltage Clock Frequency Oscillation Frequency Frame Frequency Operating Temperature Symbol VDISP VDD VIH VIL fC fOSC fFR TOP R2=4.7kW C2=10pF -- Condition -- -- All inputs except OSC0 All inputs except OSC0 -- R2=4.7kW, C2=10pF 1/3 Duty 1/2 Duty Min. 8.0 4.5 0.8VDD -- -- 2.6 211 317 -40 Typ. 13.0 5.0 -- -- -- 3.3 269 403 -- Max. 18.0 5.5 -- 0.2VDD 1.0 4.0 325 488 85 Unit V V V V MHz MHz Hz Hz C
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Semiconductor
MSM9210
ELECTRICAL CHARACTERISTICS
DC Characteristics
Ta=-40 to 85C,VDISP =8.0 to 18.0V, VDD=4.5 to 5.5V Parameter High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Symbol Applied pin VIH VIL IIH IIL VOH1 High Level Output Voltage VOH2 VOH3 VOH4 VOL1 Low Level Output Voltage VOL2 VOL3 VOL4 Supply Current IDISP IDD *1) *1) *1) *1) SEG1-22 SEG23-32 GRID1-3 *2) SEG1-22 SEG23-32 GRID1-3 *2) VDISP VDD VDD=4.5V VDD=4.5V Condition -- -- VIH=VDD VIL=0.0V IOH1=-5mA VDISP=9.5V IOH2=-10mA IOH3=-5mA IOH4=-200mA IOL1=500mA VDISP=9.5V IOL2=500mA IOL3=10mA IOL4=200mA fOSC=3.3MHz, no Load fOSC=3.3MHz, no Load Min. 0.8VDD -- -1.0 -1.0 VDISP-0.8 VDISP-0.8 VDISP-0.8 VDD-0.8 -- -- -- -- -- -- Max. -- 0.2VDD 1.0 1.0 -- -- -- -- 2.0 2.0 2.0 0.8 10 8 Unit V V mA mA V V V V V V V V mA mA
*1) CS, CLOCK, DATA IN, DIM IN, SYNC IN 1, SYNC IN 2, M/S, DUP/TRI *2) DIM OUT, SYNC OUT 1, SYNC OUT 2
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Semiconductor AC Characteristics
MSM9210
Ta=-40 to 85C,VDISP =8.0 to 18.0V, VDD=4.5 to 5.5V Parameter Clock Frequency Clock Pulse Width Data Setup Time Data Hold Time CS Off Time CS Setup Time (CS-Clock) CS Hold Time (Clock-CS) Output Slew Rate Time VDD Rise Time VDD Off Time CS Wait Time Symbol fC tCW tDS tDH tCSL tCSS tCSH tR tF tPRZ tPOF tRSOFF CL=100pF Condition -- -- -- -- R2=4.7kW, C2=10pF -- -- tR=20% to 80% tR=80% to 20% Min. -- 400 400 400 20 400 400 -- -- -- 5.0 400 Max. 1.0 -- -- -- -- -- -- 4.0 4.0 100 -- -- Unit MHz ns ns ns ms ns ns ms ms ms ms ns
Mounted in a unit Mounted in a unit, VDD=0.0V --
TIMING DIAGRAM
l Data Input Timing
tCSS 1/fC CLOCK tDS DATA IN VALID VALID tDH VALID VALID tCW tCW tCSH tCSL -0.8VDD -0.2VDD -0.8VDD -0.2VDD -0.8VDD -0.2VDD
CS
l Reset Timing
tPRZ tRSOFF CS tPOF -0.8VDD -0.0VDD -0.8VDD -0.0VDD
VDD
l Driver Output Timing
tR tF tR -0.8VDISP -0.2VDISP
SEG1-20, GRID1-3
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Semiconductor l Output Timing (Duplex Operation) *1bit time=4x fOSC (The dimming data is 1016/1024 at the master mode)
2048bit times (1 display cycle) GRID1 1016bit times 8bit times GRID2 1016bit times 1016bit times 8bit times
MSM9210
VDISP 8bit times D-GND VDISP D-GND VDISP
GRID3 3bit times SEG1-32 1019bit times 5bit times 1019bit times 5bit times DIM OUT 1019bit times 1019bit times 5bit times SYNC1 1019bit times 1029bit times 5bit times SYNC2 1029bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1029bit times 5bit times 5bit times 5bit times 5bit times
D-GND VDISP D-GND VDD D-GND VDD D-GND VDD D-GND
l Output Timing (Triplex Operation) *1bit time=4x fOSC (The dimming data is 1016/1024 at the master mode)
2048bit times (1 display cycle) GRID1 1016bit times 8bit times GRID2 1016bit times 8bit times GRID3 3bit times SEG1-32 1019bit times 5bit times 1019bit times 5bit times DIM OUT 1019bit times 1019bit times 5bit times SYNC1 1019bit times 1029bit times 5bit times SYNC2 1029bit times 1019bit times 1016bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 5bit times 5bit times 5bit times D-GND VDISP D-GND VDISP D-GND VDD D-GND VDD D-GND VDD D-GND 8bit times 8bit times VDISP D-GND VDISP
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Semiconductor
MSM9210
FUNCTIONAL DESCRIPTION
Power-on Reset When power is turned on, MSM9210 is initialized by the internal power-on reset circuit, the status of the internal circuit after initialization is as follows: * The contents of the shift registers and latches are set to "0". * The digital dimming duty cycle is set to "0". * All segment outputs are set to "L" level. * All grid outputs are set to "H" level. (at a master mode) * All grid outputs are set to "L" level. (at a slave mode) Data input Data input to the DATA-IN pin is valid only when the CS pin is set at a "H" level. The input data to DATA-IN pin is shifted into the shift register at the rising edge of the serial clock. The data is automatically loaded to the latches when ths CS pin is set at a "L" level. MSM9210 uses 10-bit dimming data (D1 to D10) and 32-bit segment data (S1 to S32). To transfer these two data, the mode data (M0 to M2) must be sent after each of these data succeedingly. Mode Data Function mode is selected by the mode data (M0 to M2). The relation between function mode and mode data is as follows:
FUNCTION MODE 0 1 2 3 4 OPERATING MODE Segment Data for GRID1-3 Input Segment Data for GRID1 Input Segment Data for GRID2 Input Segment Data for GRID3 Input Digital Dimming Data Input FUNCTION DATA M0 0 1 0 1 0 M1 0 0 1 1 0 M2 0 0 0 0 1
Segment Data Input [Function Mode: 0 to 3] * MSM9210 receive the segment data when function mode 0 to 3 are selected. * The same segment data is transferred to the 3 segment data latches at the same time when the function mode 0 is selected. * The segment data is transferred to only one segment data latch that is selected by function data, when the function mode is 1, 2 or 3 is selected. * Segment output (SEG1 to 32) becomes "H" level (lightning) when the segment data (S1 to S32) is set to "1". [Data Format] Input Data : 35 bits Segment Data : 32 bits Mode Data : 3 bits
Bit Input Data 1 S1 2 S2 3 S3 4 S4 29 30 31 32 33 M0 34 M1 35 M2 S29 S30 S31 S32
Display Data (32bits)
Mode Data (32bits)
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Semiconductor [Bit correspondence between segment output and display data]
SEG n Display data SEG n Display data 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MSM9210
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32
Digital Dimming Data Input [Function Mode: 4] * MSM9210 receives the digital dimming data when function mode 4 is selected. * The output duty changes in the range of 0/1024 (0%) to 1016/1024 (99.2%) for each grid. * The 10-bit digital dimming data is input from LSB [Data Format] Input Data : 13 bits Digitsl Diming Data : 10 bits Mode Data : 3 bits
Bit Input Data 1 D1 LSB 2 D2 3 D3 4 D4 5 D5 6 D6 7 D7 8 D8 9 D9 10 11 12 13
Digital Dimming Data (10bits)
D10 M0 M1 M2 MSB Mode Data (3bits) (MSB)
(LSB) D1 0 1 1 0 1 1 D2 0 0 1 0 0 1 D3 0 0 1 0 0 1 D4 0 0 0 1 1 1
Dimming Data D5 0 0 1 1 1 1 D6 0 0 1 1 1 1 D7 0 0 1 1 1 1 D8 0 0 1 1 1 1 D9 0 0 1 1 1 1
D10 0 0 1 1 1 1
Duty Cycle 0/1024 1/1024 1015/1024 1016/1024 1016/1024 1016/1024
Master Mode Master Mode is selected when M/S pin is set at "H" level. The master mode operation is as follows: * The input levels of DIM IN, SYNC IN1 and SYNC IN2 are ignored. * The pulse width of GRID1 to 3 and SEG1 to 32 are controlled by the internal digital dimming circuit. * The segment Latch1 to 3 corresponding to GRID1 to 3 selected by the internal timing generator. * SYNC OUT1 and 2 output the segment latch select signals. * DIM OUT outputs the segnent pulse width control signal.
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Semiconductor
MSM9210
Slave Mode Slave Mode is selected when M/S pin is set at "L" level. The slave mode operation is as follows: * The internal dimming circuit is ignored. * The pulse width of SEG1 to 32 are controlled by the pulse width of DIM IN signal. * The segment Latch1 to 3 corresponding to GRID1 to 3 selected by SYNC IN1 and SYNC IN2 signals. * The output levels of GRID1 to 3, DIM OUT, SYNC OUT1 and SYNC OUT2 are set at "L" level.
[Correspondence between SYNC IN1, 2 and Segment Latch1 to 3] [Correspondence between DIM IN and SEG1 to 32]
SYNC IN 1 0 1 0 1
SYNC IN 2 0 0 1 1
Segment Latch No Latch1 Latch2 Latch3
GRID No GRID1 GRID2 GRID3
DIM IN 0 1
SEG1 to 32 Low High
Note: When segment Data (S1 to S32) are "H" level.
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Semiconductor
VDD
VDISP
VDD
VDISP
APPLICATION CIRCUITS
VDD SEG32 GRID1 M/S GND VDD GRID2
S1 S2 S3 G1 G2
MSM9210 SEG1 (MASTER)
SEG32 GRID1
MSM9210 SEG1 (SLAVE)
VDISP GRID2
VDD
M/S
DUP/TRI
S126 S127 S128
GRID3 SYNC OUT 2 SYNC OUT 1 DIM OUT DUP/TRI SYNC IN 2 SYNC IN 1 DIM IN CS DATA IN CLOCK OSC 1 OSC 0 L-GND L-GND
GRID3 SYNC OUT 2 SYNC OUT 1 DIM OUT
Duplex VF Tube
Ef
Microcontroller
SYNC IN 2 SYNC IN 1 DIM IN CS DATA IN CLOCK OSC 1
OSC 0 L-GND
L-GND
1. Circuit for the duplex VF tube with 128 segments (2 Grid 64 Anode)
GND
GND
MSM9210
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Semiconductor
VDD
VDISP
VDD
VDISP
VDD SEG32 GRID1 M/S DUP/TRI GND GRID2
S1 S2 S3 G1 G2
MSM9210 SEG1 (MASTER)
SEG32 GRID1
MSM9210 SEG1 (SLAVE)
VDISP GRID2
VDD
M/S
DUP/TRI
GND
S126 S127 S128
GRID3 SYNC OUT 2 SYNC OUT 1 DIM OUT SYNC IN 2 SYNC IN 1 DIM IN CS DATA IN CLOCK OSC 1 OSC 0 L-GND L-GND
GRID3 SYNC OUT 2 SYNC OUT 1 DIM OUT
Triplex VF Tube
Ef
Microcontroller
SYNC IN 2 SYNC IN 1 DIM IN CS DATA IN CLOCK OSC 1
OSC 0 L-GND
L-GND
2. Circuit for the triplex VF tube with 192 segments (3 Grid 64 Anode)
GND
MSM9210
GND
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Semiconductor
MSM9210
PACKAGE DIMENSIONS
(Unit : mm)
QFP56-P-910-0.65-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.43 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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